Module model 

The model attempts to document what the HashX constraints are, separate from the process of implementing those constraints.

Enums

Pass 🔒

One specific pass in the multi-pass instruction choice process

RegisterWriter 🔒

Information about the instruction that writes to a register, from the perspective of our particular constraints here

Constants

DISALLOW_REGISTER_FOR_ADDSHIFT 🔒

Special case for register R5

REQUIRED_INSTRUCTIONS 🔒

Programs require an exact number of instructions. (The instruction buffer must have filled without any of the other stopping conditions)

REQUIRED_MULTIPLIES 🔒

Programs require an exact total number of multiply instructions, they can’t be skipped for any reason.

REQUIRED_OVERALL_RESULT_AT_CYCLE 🔒

Programs require an exact overall data latency, represented as the simulated cycle at which the last register write completes.

Functions

disallow_opcode_pair 🔒

Should proposed be rejected as the immediate successor of previous?

disallow_src_is_dst 🔒

Does an instruction prohibit using the same register for src and dst?

is_multiply 🔒

Determine which ops count when testing REQUIRED_MULTIPLIES.

writer_pair_allowed 🔒

Should this_writer be allowed on a register which was previously written using last_writer?