pub(super) const DISALLOW_REGISTER_FOR_ADDSHIFT: RegisterId;Expand description
Special case for register R5
HashX special-cases one specific register for AddShift in order to fit in the constraints of x86_64 under the encodings chosen by HashX’s original x86 compiler backend. See Table 2-5 in the Intel 64 and IA-32 Software Developer Manual Volume 2A, “Special Cases of REX Encodings”. Register R13 in x86_64 maps directly to R5 in the original HashX implementation. Even on backends where this constraint is not relevant, the program generation process requires us to take it into account.